Application of ISD2560 voice chip in queuing machine system

Abstract: The pin function, operation mode and specific use method of the ISD2560 voice chip produced by Winbond Company are introduced in detail. The hardware structure and software design method of the voice system composed of AT89C51 and ISD2560 are given.

At present, the application range of computer voice services is getting wider and wider, such as computer voice clocks, voice-type digital multimeters, mobile phone charge inquiry systems, and bus stop devices. The ISDN 2500 series voice chip produced by Winbond is a computer voice recording and playback device with strong functions. It can be used in many occasions that require voice services. AT89C51 is a single-chip microcomputer with good performance and low price produced by ATML. The text introduces the voice part of the intelligent queuing machine composed of AT89C51 and ISD2560, which can realize the segmented recording and combined playback of the voice, and can modify the software to achieve the entire segment or loop playback. This article focuses on the implementation method of using the circuit to complete functions such as voice combination playback.

ISD2560 is a type of ISD series of monolithic voice recording and playback integrated circuits. This is a permanent memory type voice recording and playback circuit. The recording time is 60s, which can be repeatedly recorded and played 100,000 times. The chip adopts the patented technology of multi-level direct analog storage. Each sample value can be directly stored in a single EEPROM unit on the chip, so it can reproduce voice, music, tone and effect sound very realistically, thus avoiding the general solid Quantization noise and "metallic sound" caused by quantization and compression in the recording circuit. The sampling frequency of this device is 8.0kHz. The lower the sampling frequency of the same series of products? The longer the recording and playback time? But the passband and sound quality will be reduced. In addition, ISD2560 also eliminates the A / D and D / A converters. It is highly integrated, including preamplifier, internal clock, timer, sampling clock, filter, automatic gain control, logic control, analog transceiver, decoder and 480 kilobytes of EEPROM. ISD2560 internal EEPROM storage unit is evenly divided into 600 rows, there are 600 address units, each address unit points to one row, and the address resolution of each address unit is 100 ms. In addition, ISD2560 also has the control interface required by the microcontroller. By manipulating the address and the control line, different tasks can be completed to achieve complex information processing functions, such as the combination of information, connection, setting of fixed information segments and information management. ISD2560 can not be segmented, and can also be segmented in any combination according to the minimum segment length.

1 Pin function of ISD2560

ISD2560 has two packages: 28-pin SOIC and 28-pin PDIP. Figure 1 shows the pinout. The main functions of each pin are as follows:

Power supply (VCCA, VCCD): In order to minimize noise, the internal analog and digital circuits of the chip use different power buses, and are led to the outer package. The analog and digital power terminals are preferably routed separately and should be connected as close as possible to the power supply terminal, and the decoupling capacitor should be as close as possible to the chip.

Ground wire (VSSA, VSSD): Since different analog and digital ground wires are used inside the chip, these two pins are best connected to ground through a low impedance path.

Power saving control (PD): Pulling this terminal high can stop the chip and enter the power saving state. When the chip overflows? That is, the OV terminal outputs a low level, the local terminal should be briefly raised to reset the chip; in addition, the PD terminal has a special purpose in mode 6.

Chip Select (CE): When this terminal goes low and the PD is also low, recording and playback operations are allowed. The falling edge of the chip at this end will latch the state of the address line and the P / R end; in addition, it also has a special meaning in mode 6.

Recording and playback mode (P / R): The state of this terminal is generally latched on the falling edge of CE. High level selects playback, low level selects recording. During recording, the starting address is provided by the address end until the recording continues until CE or PD becomes high, or the memory overflows; if it is the former case, the chip will automatically write the EOM mark at the end of the recording. When playing, the starting address is provided by the address end, and the playing continues until the EOM mark. If CE is always low, or the chip is operating in certain operating modes, playback will ignore EOM and continue until overflow occurs.

End of message mark (EOM): The EO mark is automatically inserted by the chip at the end of the message segment during recording. When the playback encounters EOM, this terminal outputs a low-level pulse. In addition, the ISD2560 chip will automatically detect the power supply voltage to maintain the integrity of the information. When the voltage is lower than 3.5V, the terminal becomes low, and the chip can only play. In the mode state, it can be used to drive the LED to indicate the current working state of the chip.

figure 2

Overflow flag (OVF): When the chip is at the end of the storage space, this terminal outputs a low-level pulse to indicate overflow, and then the state of this terminal follows the state of the CE terminal until the PD terminal becomes high. In addition, this terminal can also be used to cascade multiple voice chips to extend the playback time.

Microphone input (MIC): This end is connected to the on-chip preamplifier. The on-chip automatic gain control circuit (AGC) can control the gain from -15 to 24dB. The external microphone should be coupled to this terminal through a series capacitor. The coupling capacitor value and the 10kΩ input impedance at this end determine the low frequency cutoff point of the chip band.

Microphone reference (MIC REF): This end is the reverse input of the preamplifier. When the microphone is connected in a differential form, it can reduce noise and improve the common mode rejection ratio.

Automatic Gain Control (AGC): AGC can dynamically adjust the pre-gain to compensate for wide changes in the microphone input level, so that when recording a large change in volume (from whisper to loud noise) can maintain minimum distortion. The response time depends on the built-in 5kΩ resistor of this terminal and the time constant of the capacitor connected from this terminal to the VSSA terminal. The release time depends on the time constant set by the external capacitor and resistor connected to the ground in parallel. Selecting the nominal values ​​of 470kΩ and 4.7μF resistors and capacitors can achieve satisfactory results.

Analog output (ANA OUT): Preamplifier output. Its pre-voltage gain depends on the AGC terminal level.

Analog input (ANA IN): This end is the input of the recording signal of the chip. For microphone input, the ANA OUT terminal should be connected to this terminal through an external capacitor. The input impedance of the capacitor and the local end of 3kΩ determines the additional low-end cut-off frequency of the chip band. Other audio sources can be directly connected to this end through AC coupling.

Loudspeaker output (SP +, SP-): It can drive a loudspeaker of more than 16Ω (the power when storing the sound is 12.2mW? The power when playing the AUX IN is 50mW). For single-ended output, there must be an indirect coupling capacitor between the output and the speaker? For a double-ended output, the power can be increased to 4 times without a capacitor.

image 3

Auxiliary input (AUX IN): When CE and P / R are high, no sound is played or the sound is overflowed? The input signal at this end will drive the speaker output through the internal power amplifier. When multiple ISD2560 chips are cascaded? The speaker output of the subsequent stage will be connected to the output amplifier of this stage through this end. To prevent noise? It is recommended to store the memory information? Do not have a drive signal at this end.

External clock (XCLK): There is a pull-down element inside this terminal, and it should be grounded when not in use.

Address / mode input (AX / MX): The function of the address terminal depends on the state of the highest two bits (MSB, namely A8 and A9). When one of the top two digits is 0, all inputs are used as the starting address of the current recording or playback. The address terminal is only for input, and does not output the internal address information during the operation. The address is latched on the falling edge of CE. When the highest two digits are all 1, A0 ～ A6 can be used for mode selection.

2 Operation mode

Because ISD2560 has built-in several operation modes, it can realize the most functions with the least peripheral devices. The operation mode is also controlled by the address terminal; when the highest two bits are 1, the other address terminal is set high to select a specific mode (or modes). Therefore the operating mode and direct addressing are mutually exclusive. The specific operation mode is listed in Table 1. The operating mode can be realized by a microcontroller or by hardware. There are two points to note when using the operation mode: (1) All operations start from address 0, the beginning of the storage space. Subsequent operations can start from other addresses according to the selected mode. However, after the circuit is switched from recording to playback or transcription from playback (except M6 mode), or after a power-down cycle has been performed, the address counter will be reset to zero. (2) When CE goes low and the highest two address bits are both high, the operation mode is executed. This mode of operation will remain in effect until CE changes from high to low again, and the chip re-latches the current address / mode terminal level and performs the corresponding operation.

Table 1 Summary of operating modes

3 Voice playback circuit design based on ISD2560

3.1 System hardware circuit

Figure 2 shows the connection diagram of ISD2560 and AT89C51. In the picture, the crystal oscillator Y1 of the single-chip microcomputer system is 11.0593MHz, the EOM is directly connected to P1.7, and the PD is connected to P1.6. CE is connected to P3.6 and XCLK is grounded. SN74HC573 is an address latch, and LM386N-1 is an audio power amplifier. The voice chip in this system works in the playback state, and the information in the chip can be copied by the dedicated ISD1425 advanced voice programming copy machine, so the playback quality is very good, and it can also be used to read the storage address of each voice . Figure 3 shows the playback timing diagram of ISD2560.

3.2 System software design

The flow chart of software design of speech system based on ISD2560 is shown in Figure 4. Assuming that there are 20 voice segments to be played, when sending a number to the address corresponding to DPTR, you must first wait for the level of the EOM pin of the voice chip to become low, and then wait for the level of the EOM pin to become high. Continue reading the other paragraphs; otherwise, there will be a "pop" sound. In addition, you can add some appropriate delay after each segment of speech.

4 Conclusion

The actual application effect of the ISD2560 voice chip in the voice recording and playback system is very good, and the programming is relatively simple. Compared with other digital voice chips, the outstanding feature of the ISD2560 is the excellent playback effect, which can reproduce the voice very realistically Music, tone and effect sound, in addition, using this chip can also design the circuit to realize the recording operation, which is very convenient to use.

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