Single-chip language processor with extremely long recording time

The MCU (Microcontroller Unit) interface circuit includes four pins: INH, SR, DO, and MS. The INH pin is set to a low level under MCU control, while SR serves as the data input line, and DO is used for data output. Each bit of the data input or output is determined by the state of the MS pin during the clock cycle.

During the write process controlled by the MCU, a command is sent to the language processor, and data is input through the SR terminal. When the MS terminal is active (high), the INH terminal remains low. However, when the MS terminal transitions from high to low, the SR terminal becomes valid for data input. The write command consists of 4 bits, which include the start address (10-bit address counter), an 8-bit control word, or a 16-bit end address.

In the read process under MCU control, after sending a read command to the language processor, the first byte of data is obtained from the DO terminal. Subsequent data bytes are read on each rising edge of the MS terminal. The read command can be used to retrieve data from the status register, extended address counter, or the main address counter.

Manual control and MCU control mode switching: After power-up, the FC9201 language processor resets via the RT terminal and enters manual control mode. To switch to MCU control, a negative pulse is applied to the INH terminal. This mode is maintained during the pulse. If the system needs to return to manual control, a negative pulse must be applied to the RT terminal, and the INH terminal should return to a high level. After power-on, the system alternates between manual and MCU control modes. Once the MCU state detection word is written, it doesn't need to be repeated.

External memory compression technology: To optimize limited DRAM space, the compression mode is enabled by setting the MCS bit in the state control word. The PD1 and PD2 bits allow selection of compression parameters. Then, based on the SEN1 and SEN2 bits, the system outputs valid or invalid language signals.

External memory capacity: A single group of DRAMs can support up to 4 Mbit. With 64-level extended pulse output, the total capacity becomes 64 × 4 Mbit. At a sampling rate of 16 kHz, the recording or playback time exceeds 4 hours.

Low-pass filter cutoff frequency selection: When the BW bit in the state control word is 0, the cutoff frequency is 3.4 kHz; when it is 1, it drops to 2.7 kHz. In manual control mode, at a 16 kHz rate, the cutoff frequency is 2.7 kHz, and at 32 kHz, it increases to 3.4 kHz.

Rate selection: When the external clock frequency is 3.58 MHz, the system can operate at either 16 kHz or 32 kHz. Adjusting the rate involves changing the external clock frequency. For example, using a 5.5 MHz clock can change the original 16 kHz rate to 24 kHz.

Application of FC9201: The figure above shows the typical electrical schematic of FC9201. The circuit is directly controlled by a microprocessor, using a 4-bit interface (INH, SR, MS, DO). Recording or playback operations can be initiated and ended by writing start addresses, end addresses, and state control words into their respective registers. The internal address mapping is shown in the diagram below.

The analog section of FC9201 includes microphone amplification, ADM filtering, modulation, and demodulation. The microphone amplifier is a Class I operational amplifier with adjustable gain via R2 and R1, and frequency characteristics can be fine-tuned using R2 and C2. The typical bandwidth is 3.4 kHz. The ADM input impedance is around 25 kΩ, and a coupling capacitor C3 is used to suppress 50 or 60 Hz hum at a cutoff frequency of 300 Hz.

To reduce distortion in ADM modulation, the signal amplitude at the ADI terminal should remain within 2 V peak-to-peak. The ADO signal, which includes the D/A conversion output plus 1/2 VDD (Vref), is routed to a low-pass filter. The filtered signal is then restored to an audio signal through RC filtering at the FILOUT terminal and sent to an audio power amplifier. The LM386 amplifier drives the speaker for sound output.